AltiVec

From Mac Guides

AltiVec (aka "Velocity Engine") is a floating-point and integer SIMD instruction set found on PowerPC G4 and G5 chips. Altivec was designed by Apple, IBM and Motorola, also known as the AIM Alliance.

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Architecture

AltiVec was created by the AIM alliance for PowerPC processors. AltiVec features 32 128-bit registers that can represent 16 8-bit signed or unsigned characters, 8 16-bit signed or unsigned shorts, 4 32-bit ints or 4 32-bit floats.

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The Competition

When AltiVec debuted in the late 1990's, it was widely considered one of the most powerful desktop SIMD implementations. However, Intel's SSE2 and SSE3 saw a dramatic rise in instructions. Despite these advancements, Altivec was still the only SIMD implementation to support the special RGP "pixel" data type.

AltiVec is capable of performing 8 32-bit FLOPS per cycle, whereas SSE can only perform 4 32-bit FLOPS per cycle (albeit they can also perform 64-bit operations using SSE2 whereas AltiVec is not capable of 64-bit calculations). Therefore, since the clock speed of Pentium chips is not currently twice the speed of any PowerPC chip, it can be implied that AltiVec is faster.

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